System Verilog OVM – Hello World Program

Here is hello world program in

System Verilog Open Verification Methodology

Download here. hello_ovm

// Filename : hello_ovm.sv

// Author : A.G.Raja

// License : GPL

// Website : https://agraja.wordpress.com

module hello_ovm;

`include “ovm.svh”

class Random extends ovm_transaction;

rand int num;

constraint c { num >= 0 && num < 50; }

function new(string name);

super.new(name);

endfunction

endclass

Random r;

initial begin

r = new(“Hello OVM”);

r.print();

ovm_report_message(“APPLIED ELECTRONICS JOURNAL”,

$psprintf(“Hello World”));

end

endmodule

// End of file hello_ovm.sv

One liner to run this in IUS

When OVM library is not installed by default:

1) Set OVMHOME to the root directory where OVM library is installed

setenv OVMHOME /netstar/ag.raja/sv/OVM/ovm-1.1

2.a) IUS 6.2-s003 and IUS 6.2-s004

irun -sv -nowarn PMBDVX -ovmhome $OVMHOME $OVMHOME/src/ovm_pkg.sv hello_ovm.sv

2.b) IUS 6.2-s005

irun -sv -ovmhome $OVMHOME $OVMHOME/src/ovm_pkg.sv hello_ovm.sv

When OVM is already installed to $CDS_INST_DIR/tools/ovm

a) IUS 6.2-s003 and IUS 6.2-s004

irun -sv -ovm -nowarn PMBDVX hello_ovm.sv

b) IUS 6.2-s005

irun -sv -ovm hello_ovm.sv

Using Options File

irun –f options_file

// options_file begins here

-sv

-ovm

hello_ovm.sv

// options_file ends here

Download here. hello_ovm

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3 thoughts on “System Verilog OVM – Hello World Program

  1. Pingback: System Verilog OVM - Hello World Program | 101 Articles

  2. Pingback: Electronics

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